module dds_FM_interface
(
input clk,rst_n,
input avs_wr_n,
input [31:0]avs_datewrite,
input [1:0]avs_address,
output reg[31:0]FM_date_k,
output reg[3:0]shift
);
reg date_wr_n,shift_wr_n;
always@(avs_address)  begin
 date_wr_n<=1'b1;
 shift_wr_n<=1'b1;
 case(avs_address)
  2'b01:date_wr_n<=1'b0;
  2'b11:shift_wr_n<=1'b0;
  default:  begin
               date_wr_n<=1'b1;
					shift_wr_n<=1'b1;
				end
 endcase
end
always@(posedge clk,negedge rst_n)  begin
 if(!rst_n)
  FM_date_k<=32'b0;
 else
  if((!date_wr_n)&&(!avs_wr_n))
   FM_date_k<=avs_datewrite;
end
always@(posedge clk,negedge rst_n)  begin
 if(!rst_n)
  shift<=4'b0;
 else
  if((!shift_wr_n)&&(!avs_wr_n))
   shift<=avs_datewrite[3:0];
end
endmodule
